Download Datasheets 24LCS61 Device 
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Home - Memory Products - 128 to 1K Devices - 24LCS61 Device, download datasheet

Download Datasheets 24LCS61 Device


The 24LCS61 is a 1K bit Serial Electrically Erasable PROM developed for applications that require many devices on the same bus but do not have the I/O pins required to address each one individually. This device contains an 8-bit address register that is set upon power-up and allows connection of up to 255 devices on the same bus. The 24LCS61 features a 2-wire serial interface bus (I2C compatible), software write protection of the entire array, automatic bus arbitration, and a page-write capability for up to 16-bytes of data. The 24LCS61 is available in the industrial temperature range and a wide voltage range (2.5V to 5.5V). The 24LCS61 is available in standard 8-pin PDIP and TSSOP packages.

Datasheet and Other Documentation

Detailed Content

Lit. Number

Download

 

24LCS61/62 Datasheet

21226c

Download 24LCS61/62 Datasheet

Status

In Production

Specification Chart

Operat. Voltage

E/W Cycles

Density (Organ.)

Write Speed

Clock Speed

2.5V to 5.5V

1M

1K bits (x8)

10 ms

400 kHz

Additional Features

Addressable. Software write protect.

Package Options

8 SOIC 150mil(SN), 8 PDIP(P), 8 TSSOP(ST)



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